. | Cortex-M0 | Cortex-M0+ | Cortex-M3 | Cortex-M4 | Cortex-M7 |
Architecture Version | ARMv6-M (Von Neuman) |
ARMv6-M (Von Neuman) |
ARMv7-M (Harvard> |
ARMv7E-M (Harvard) |
ARMv7E-M (Harvard) |
Instruction Set | Thumb, Thumb-2 |
Thumb, Thumb-2 |
Thumb, Thumb-2 |
Thumb,Thumb-2, DSP, SIMD, FPU |
Thumb,Thumb-2, DSP, SIMD, FPU |
Dhrystone DMIPS/MHz | 0.87 | 0.95 | 1.25 | 1.27 | 2.14 |
CoreMark/MHz | 2.33 | 2.46 | 3.34 | 3.40 | 5.04 |
Bus Protocol | AHB Lite | AHB Lite | AHB Lite, APB | AHB Lite, APB | AHB Lite, AXI, APB |
Pipeline Stage | 3 | 2 | 3 | 3 | 6 |
Instruction/Data Cache | No | No | No | No | 4~64KB/4~64KB |
TCM(Instruction/Data) | No | No | No | No | 0~16KB/0~16KB |
Number of Interrupts | 1~32 +NMI | 1~32 + NMI | 1~240 + NMI | 1~240 + NMI | 1~240 + NMI |
Interrupt Priority | 4 | 4 | 8~256 | 8~256 | 8~256 |
Debug | JTAG, SWD | JTAG, SWD | JTAG, SWD | JTAG, SWD | JTAG, SWD |
Memory Protection Unit | No | No | Yes(option) | Yes(option) | Yes(option) |
Bit Banding Support | No | No | Yes | Yes | Yes |
Single Cycle Multiply | Yes(option) | Yes(option) | Yes | Yes | Yes |
Hardware Divide | No | No | Yes | Yes | Yes |
Single Cycle DSP/SIMD | No | No | No | Yes | Yes |
Floation Point Hardware | No | No | No | single precision | single/double precision |
CMSIS support | Yes | Yes | Yes | Yes | Yes |
Power Consumption | 12.5uW/MHz | 9.8uW/MHz | 31uW/MHz | 32.82uW/MHz | 53uW/MHz |
Anouncement Year | 2009 | 2012 | 2004 | 2010 | 2014 |
2019년 2월 20일 수요일
ARM Cortex-M0/M0+/M3/M4/M7의 특성 비교
ARM Cortex-M0/M0+/M3/M4/M7의 특성 비교
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